| Op | Instruction | Octets | dstack | Side Effects |
00 - 03 | move# | 2 | -- | dc# += imm |
04 - 07 | raread# | 1 | a -- mem[dc# + a] | |
08 - 0B | rereadi# | 2 | -- | cv <- mem[mem[dc#] + imm] |
0C | inc | 1 | a -- (a + 1) | c, o |
0D | dec | 1 | a -- (a - 1) | c, o |
0E | carry | 1 | v -- (v + c) | c, o |
0F | borrow | 1 | v -- (v + c - 1) | c, o |
10 | inv | 1 | v -- ~v | |
11 | break | 1 | -- | Pops the lstack and goes to end of loop |
12 | return | 1 | -- | pop cstack |
13 | continue | 1 | -- | Goes to the next loop iteration |
14 | inten | 1 | -- | Enables only selected interrupts |
15 | intrecv | 1 | -- | Interrupt sync; cv <- bus, v |
16 | iloop | 3 | -- | ls <- pc + 1, pc + imm, ∞, 0 |
17 | kill | 1 | -- | Kill all selected cores |
18 | intwait | 1 | -- | Waits for an interrupt before continuing |
19 | getbp | 1 | b -- perm | Gets the permission on bus b |
1A | getba | 1 | b -- addr | Gets the address on bus b |
1B | calli | 1 + WORD | -- | pc = imm; push cstack |
1C | jmpi | 1 + WORD | -- | pc = imm |
1D | bra | 3 | -- | pc += imm |
1E | discard | 1 | -- | Discard the top loop without going to the end |
1F | callri | 3 | -- | pc += imm; push cstack |
20 - 2F | cv# | 1 | -- cv# | cv# synchronizes |
30 - 33 | read# | 2 | -- mem[dc#] | dc# += imm |
34 - 37 | rareadi# | 2 | -- mem[dc# + imm] | |
38 - 3B | get# | 1 | -- dc# | |
3C - 3F | i# | 1 | -- i# | |
40 - 43 | writepre# | 2 | v -- | dc# += imm; mem[dc#] = v |
44 - 47 | writepst# | 2 | v -- | mem[dc#] = v; dc# += imm |
48 - 4B | set# | 1 | a -- | dc# = a |
4C - 4F | rawritei# | 2 | v -- | mem[dc# + imm] = v |
50 - 53 | rewritei# | 2 | v -- | mem[mem[dc#] + imm] = v |
54 - 57 | reread# | 1 | a -- | cv <- mem[mem[dc#] + a] |
58 | add | 1 | a b -- (a + b) | c, o |
59 | sub | 1 | a b -- (a - b) | c, o |
5A | lsl | 1 | a b -- (a << b) | |
5B | lsr | 1 | a b -- (a >> b) | |
5C | csl | 1 | a b -- ((a << b) or (a >> (b - WORD))) | |
5D | csr | 1 | a b -- ((a >> b) or (a << (b - WORD))) | |
5E | asr | 1 | a b -- (a >>> b) | |
5F | and | 1 | a b -- (a & b) | |
60 - 63 | rewrite# | 1 | v a -- | mem[mem[dc#] + a] = v |
64 - 67 | rawrite# | 1 | v a -- | mem[dc# + a] = v |
68 | write | 1 | v a -- | mem[a] = v |
69 | writep | 1 | v a -- | progmem[a] = v |
6A | writepo | 1 | o a -- | progmem[a] = o |
6B | writeps | 1 | s a -- | progmem[a] = s |
6C | beq | 3 | a b -- | if a == b then pc += imm |
6D | bne | 3 | a b -- | if a != b then pc += imm |
6E | bles | 3 | a b -- | if a < b then pc += imm |
6F | bleq | 3 | a b -- | if a <= b then pc += imm |
70 | blesu | 3 | a b -- | if a < b then pc += imm |
71 | blequ | 3 | a b -- | if a <= b then pc += imm |
72 | recv | 1 | n a -- | Stream in to a; cv <- bus |
73 | send | 1 | n a -- | Stream n words to buses from mem[a] |
74 | incept | 1 | n a -- | Incept target cores from main mem; see send |
75 | set | 1 | m s -- | Clear ifile and set register s to m |
76 | sel | 1 | m s -- | Ors m with register s of ifile |
77 | setpa | 1 | perm addr -- | Sets UARC permission and address delegation |
78 | expect | 1 | v b -- | Send v to bus b; cv <- response |
79 | sef | 1 | a f -- | Sets fault f handler to a |
7A | reset | 1 | _ _ -- | Resets the core |
7B | ddrop | 1 | _ _ -- | Drops two elements from the stack |
7C | sendp | 1 | n a -- | Stream n words to buses from progmem[a] |
7D | inceptp | 1 | n a -- | Incept target cores from program mem; see send |
7E | RESERVED | 1 | _ _ -- | |
7F | RESERVED | 1 | _ _ -- | |
80 | addi | 1 + WORD | a -- (a + imm) | c, o |
81 | addi8 | 2 | a -- (a + imm) | c, o |
82 | addi16 | 3 | a -- (a + imm) | c, o |
83 | subi | 1 + WORD | a -- (imm - a) | c, o |
84 | lsli | 2 | a -- (a << imm) | |
85 | csli | 2 | a -- ((a << imm) or (a >> (imm - WORD))) | |
86 | asri | 2 | a -- (a >>> imm) | |
87 | andi | 1 + WORD | a -- (a & b) | |
88 | ori | 1 + WORD | a -- (a or b) | |
89 | xori | 1 + WORD | a -- (a ^ b) | |
8A | bc | 3 | -- | if c then pc += imm |
8B | bnc | 3 | -- | if ~c then pc += imm |
8C | bo | 3 | -- | if o then pc += imm |
8D | bno | 3 | -- | if ~o then pc += imm |
8E | bi | 3 | -- | if i then pc += imm; i = 0 |
8F | bni | 3 | -- | if ~i then pc += imm; i = 0 |
90 - 93 | index# | 2 | -- (dc# + imm) | |
94 | imm8 | 2 | -- imm | |
95 | imm16 | 3 | -- imm | |
96 | imm32 | 5 | -- imm | |
97 | imm64 | 9 | -- imm | Only supported on u0-64 |
98 | getp | 1 | -- perm | Get UARC permission |
99 | geta | 1 | -- addr | Get UARC address |
9A | RESERVED | 1 | -- _ | |
9B | RESERVED | 1 | -- _ | |
9C | RESERVED | 1 | -- _ | |
9D | RESERVED | 1 | -- _ | |
9E | RESERVED | 1 | -- _ | |
9F | RESERVED | 1 | -- _ | |
A0 | or | 1 | a b -- (a or b) | |
A1 | xor | 1 | a b -- (a ^ b) | |
A2 | read | 1 | a -- | cv <- mem[a] |
A3 | call | 1 | a -- | pc = a; push cstack |
A4 | jmp | 1 | a -- | pc = a |
A5 | intset | 1 | p -- | Set selected interrupt addresses to p |
A6 | seb | 1 | b -- | Set a single bus |
A7 | slb | 1 | b -- | Select an additional UARC bus |
A8 | usb | 1 | b -- | Unselect a UARC bus |
A9 | intsend | 1 | v -- | Send value to selected buses |
AA | loop | 3 | n -- | ls <- pc + 1, pc + imm, n, 0 |
AB | bz | 3 | n -- | if n == 0 then pc += imm |
AC | bnz | 3 | n -- | if n != 0 then pc += imm |
AD | writepi | 1 + WORD | v -- | Writes v to instruction memory at imm |
AE | writepri | 3 | v -- | progmem[pc + imm] = v |
AF | drop | 1 | _ -- | Drops one element from the stack |
B0 - B3 | push# | 1 | -- | Pushes dc# onto the astack |
B4 - B7 | pop# | 1 | -- | Pops dc# from the astack |
B8 | ba | 3 | b -- | Branch if an interrupt is available on bus b |
B9 | bna | 3 | b -- | Branch if an interrupt is not available on bus b |
BA | writepori | 3 | o -- | progmem[pc + imm] = o |
BB | writepsri | 3 | s -- | progmem[pc + imm] = s |
BC | RESERVED | 1 | _ -- | |
BD | RESERVED | 1 | _ -- | |
BE | RESERVED | 1 | _ -- | |
BF | RESERVED | 1 | _ -- | |
C0 - DF | rot# | v #.. -- #.. v | |
E0 - FF | copy# | v #.. -- v #.. v | |